Semiconductor device and manufacturing method of the same

ABSTRACT

The objective of the present invention is to provide a semiconductor device of a hetero-junction field effect transistor that is capable of obtaining a high output and a high breakdown voltage and a manufacturing method of the same. The present invention is a semiconductor device of a hetero junction field effect transistor provided with an Al x Ga 1-x N channel layer with a composition ratio of Al being x (0&lt;x&lt;1) formed on a substrate, an Al y Ga 1-y N barrier layer with a composition of Al being y (0&lt;y≦1) formed on the channel layer, and source/drain electrodes and a gate electrode formed on the barrier layer, wherein the composition ratio y is larger than the composition ratio x.

CROSS REFERENCES TO RELATED APPLICATIONS

This application is a divisional of and claims the benefit of priorityunder 35 U.S.C. §120 from U.S. Ser. No. 12/054,714, filed Mar. 25, 2008,the entire contents of which are incorporated herein by reference. U.S.Ser. No. 12/054,714 claims the benefit of priority under 35 U.S.C. §119from Japanese Patent Application Nos. JP2007-078306, filed Mar. 26,2007, JP2007-191646, filed Jul. 24, 2007, and JP2008-022555, filed Feb.1, 2008.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention is an invention relating to a semiconductor deviceand a manufacturing method of the same, and especially relating to asemiconductor device of a hetero-junction field effect transistor and amanufacturing method of the same.

2. Description of the Background Art

A GaN layer is used as a channel layer in a conventional hetero-junctionfield effect transistor of a semiconductor device containing nitride. Aspecific configuration is disclosed in Yasuhiro Okamoto and 5 others,“L-Band High Output AlGaN/GaN Hetero junction FET on SiC Substrate”,Technical Report of IEICE, The Institute of Electronics, Information andCommunication Engineers, 2002, ED2002-94, pp. 85-88. An L-band highoutput AlGaN/GaN hetero-junction FET on a SiC substrate is disclosed inYasuhiro Okamoto and 5 others, “L-Band High Output AlGaN/GaN Heterojunction FET on SiC Substrate”, Technical Report of IEICE, The Instituteof Electronics, Information and Communication Engineers, 2002,ED2002-94, pp. 85-88., and it is a hetero-junction field effecttransistor consisting of a nitride semiconductor using a GaN layer as achannel layer.

Further, in a conventional hetero junction field effect transistorconsisting of a nitride semiconductor, a source/drain electrode isformed with a deposited film in which a metal layer consisting of aplurality of Ti/Al etc. is alloyed, and a region doped with n-typeimpurities at a higher concentration than that of a lower part of thegate electrode by using a Si ion implantation method, etc. is provided.For example, the hetero-junction field effect transistor consisting of anitride semiconductor described in Japanese Patent Application Laid-OpenNo. 2006-134935.

SUMMARY OF THE INVENTION

However, a desired output cannot be obtained in the conventionalhetero-junction field effect transistor consisting of a nitridesemiconductor, and it is necessary to make it have a higher output.Further, making a device have a high breakdown voltage has been one ofthe effective means in order to make the hetero-junction field effecttransistor have a high output.

Further, it is effective to make a field effect transistor have a highbreakdown voltage in order to make the hetero-junction field effecttransistor consisting of a nitride semiconductor have a high output. Itbecomes effective for obtaining a high breakdown voltage to use amaterial having a higher electric breakdown field. However, because thehigher the electric breakdown field the material has, the larger theband gap is, and on the contrary, a source/drain (ohmic) electrodehaving low resistance is difficult to form. Especially in the case ofthe hetero-junction field effect transistor, because it is necessarythat the material used in the barrier layer has a larger band gap thanthat of the channel layer, when the material used in the channel layerhas a large band gap, it becomes larger than the band gap of thematerial used in a barrier layer, and a source/drain (ohmic) electrodehaving low resistance is even more difficult to form.

The objective of the present invention is to provide a semiconductordevice of a hetero-junction field effect transistor that is capable ofobtaining a high output and a high breakdown voltage, and amanufacturing method of the same. Further, the objective of the presentinvention is to provide a hetero-junction field effect transistorconsisting of a nitride semiconductor that is capable of realizing of asource/drain (ohmic) electrode with low resistance even when a nitridesemiconductor having a large band gap is used.

One embodiment described in the present invention is a semiconductordevice of a hetero-junction field effect transistor. Then, thesemiconductor device according to the present invention includes anAl_(x)Ga_(1-x)N channel layer with a composition ratio of Al being x(0<x<1) formed on a substrate, an Al_(y)Ga_(1-y)N barrier layer with acomposition of Al being y (0<y≦1) formed on said channel layer, andsource/drain electrodes and a gate electrode formed on said barrierlayer, wherein said composition ratio y is larger than said compositionratio x.

Because the semiconductor device according to one embodiment of thepresent invention uses Al_(x)Ga_(1-x)N (0<x<1) with a larger electricbreakdown field and a larger band gap than that of GaN in the channellayer, it becomes a semiconductor device of a hetero-junction fieldeffect transistor that is capable of obtaining a high output and a highbreakdown voltage.

One embodiment described in the present invention is a manufacturingmethod of a semiconductor device of a hetero-junction field effecttransistor. Then, the manufacturing method of a semiconductor deviceaccording to the present invention includes a step of forming anAl_(x)Ga_(1-x)N channel layer with a composition ratio of Al being x(0<x<1) on a substrate, a step of forming an Al_(y)Ga_(1-y)N barrierlayer with a composition of Al being y (0<y≦1) on said channel layerwherein the composition ratio y is larger than the composition ratio x,and a step of forming source/drain electrodes and a gate electrode onsaid barrier layer.

Because the manufacturing method of a semiconductor device according toone embodiment of the present invention includes a step of forming anAl_(x)Ga_(1-x)N (0<x<1) channel layer with a larger electric breakdownfield and a larger band gap than that of GaN, it can manufacture asemiconductor device of a hetero-junction field effect transistor thatis capable of obtaining a high output and a high breakdown voltage.

One embodiment described in the present invention is a semiconductordevice provided with a hetero-junction field effect transistor in whicha channel layer comprising a first nitride semiconductor and a barrierlayer comprising a second nitride semiconductor having a larger band gapthan that of said first nitride semiconductor form a hetero-junction.Then, in the semiconductor device according to the present invention,the band gap of said first nitride semiconductor in said channel layeris 3.8 eV or more, and a high concentration n-type impurity regionhaving an impurity concentration of 1×10¹⁸ cm⁻³ or more is formedimmediately below source/drain electrodes of said hetero-junction fieldeffect transistor.

The semiconductor device according to one embodiment of the presentinvention can reduce the ohmic contact resistance, and therefore it canrealize a device having a large current and a high output.

These and other objects, features, aspects and advantages of the presentinvention will become more apparent from the following detaileddescription of the present invention when taken in conjunction with theaccompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a cross-sectional drawing of a hetero-junction field effecttransistor according to Embodiment 1 of the present invention;

FIGS. 2 to 8 are cross-sectional drawings of the hetero-junction fieldeffect transistor according to the modified example of Embodiment 1 ofthe present invention;

FIG. 9 is a drawing showing a calculation result of an energy bandstructure and a carrier concentration in a depth direction of a barrierlayer and a channel layer of a hetero-junction field effect transistoraccording to Embodiment 2 of the present invention;

FIGS. 10 to 14 are drawings showing the relationship of sheet carrierdensity and a thickness of the barrier layer of the hetero-junctionfield effect transistor according to Embodiment 2 of the presentinvention;

FIGS. 15 to 18 are drawings to explain a manufacturing process of thehetero-junction field effect transistor according to Embodiment 3 of thepresent invention;

FIG. 19 is a vertical cross-sectional drawing showing a configuration ofa hetero-junction field effect transistor consisting of a nitridesemiconductor according to Embodiment 4 of the present invention;

FIG. 20 is a drawing showing a voltage dependency of current flowingbetween source/drain electrodes in the case that a high concentrationn-type impurities region is formed and the case that it is not formed;

FIG. 21 is a drawing showing a voltage dependency of differentialresistance in the case that a high concentration n-type impuritiesregion is formed and the case that it is not formed;

FIG. 22 is a drawing showing a channel layer Al composition dependencyof the difference in the differential resistance in the case that a highconcentration n-type impurities region is formed and the case that it isnot formed;

FIG. 23 is a drawing showing a barrier layer Al composition dependencyof the difference in the differential resistance in the case that a highconcentration n-type impurities region is formed and the case that it isnot formed;

FIG. 24 is a drawing showing a channel layer band gap dependency of thedifference in the differential resistance in the case that a highconcentration n-type impurities region is formed and the case that it isnot formed;

FIG. 25 is a drawing showing a barrier layer band gap dependency of thedifference in the differential resistance in the case that a highconcentration n-type impurities region is formed and the case that it isnot formed;

FIG. 26 is a vertical cross-sectional drawing showing a configuration ofa hetero-junction field effect transistor consisting of a nitridesemiconductor according to Modified Example 6 of Embodiment 4 of thepresent invention;

FIG. 27 is a vertical cross-sectional drawing showing a configuration ofa hetero-junction field effect transistor consisting of a nitridesemiconductor according to Modified Example 7 of Embodiment 4 of thepresent invention;

FIG. 28 is a vertical cross-sectional drawing showing a configuration ofa hetero-junction field effect transistor consisting of a nitridesemiconductor according to Modified Example 10 of Embodiment 4 of thepresent invention;

FIG. 29 is a vertical cross-sectional drawing showing a configuration ofa hetero-junction field effect transistor consisting of a nitridesemiconductor according to Modified Example 12 of Embodiment 4 of thepresent invention;

FIG. 30 is a vertical cross-sectional drawing showing a configuration ofa hetero-junction field effect transistor consisting of a nitridesemiconductor according to Modified Example 13 of Embodiment 4 of thepresent invention;

FIG. 31 is a vertical cross-sectional drawing showing a configuration ofthe hetero-junction field effect transistor consisting of a nitridesemiconductor according to Modified Example 14 of Embodiment 4 of thepresent invention;

FIG. 32 is a drawing showing an Al composition dependency ofAl_(b)Ga_(1-b)N;

FIG. 33 is a drawing showing a result in which the energy band structureand the carrier concentration in the depth direction of the barrierlayer and the channel layer in the case that the Al composition x of thechannel layer is made to be 0.2, the Al composition y of the barrierlayer is made to be 0.4, and the thickness of the barrier layer is madeto be 20 nm were derived by calculation;

FIG. 34 is a drawing showing a result in which the energy band structureand the carrier concentration in the depth direction of the barrierlayer and the channel layer in the case that the Al composition x of thechannel layer is made to be 0.2, the Al composition y of the barrierlayer is made to be 0.4, and the thickness of the barrier layer is madeto be thin to 6 nm, were derived by calculation;

FIGS. 35 to 40 are vertical cross-sectional drawings showing one exampleof a manufacturing process of the hetero-junction field effecttransistor consisting of a nitride semiconductor having a structureshown in FIG. 19;

FIG. 41 is a drawing showing a result in which the differentialresistance value in the case that a high concentration n-type impuritiesregion is not formed is evaluated at a hetero-epitaxial substrateconsisting of a plurality of the nitride semiconductors in which the Alcomposition of the channel layer is changed;

FIG. 42 is a drawing showing a result in which the differentialresistance value in the case that a high concentration n-type impuritiesregion is not formed is evaluated at a hetero-epitaxial substrateconsisting of a plurality of the nitride semiconductors in which the Alcomposition of the barrier layer is changed;

FIG. 43 is a drawing corresponding to the case that the x-axis of FIG.22 is changed to the size of the band gap obtained from the Alcomposition in FIG. 22;

FIG. 44 is a drawing corresponding to the case that the x-axis of FIG.23 is changed to the size of the band gap obtained from the Alcomposition in FIG. 23;

FIG. 45 is a vertical cross-sectional drawing showing one example of ahetero-junction field effect transistor consisting of a nitridesemiconductor according to Embodiment 5; and

FIG. 46 is a vertical cross-sectional drawing showing one example of ahetero-junction field effect transistor consisting of a nitridesemiconductor according to Modified Example 2 of Embodiment 5.

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiment 1

FIG. 1 is a cross-sectional drawing of the hetero-junction field effecttransistor according to the embodiment of the present invention. In thehetero-junction field effect transistor shown in FIG. 1, asemi-insulated SiC substrate 1 is provided in the lowest layer, and achannel layer 3 of 1 μm thickness, consisting of Al0.6Ga_(0.4)N, isprovided on top of it via a buffer layer 2. Further, in thehetero-junction field effect transistor shown in FIG. 1, a barrier layer4 of 10 nm thickness, consisting of AlN, forms a hetero-junction withthe channel layer 3. Further, in the hetero-junction field effecttransistor shown in FIG. 1, an element separation region 5 is providedin the regions on both sides in the drawing, and source/drain electrodes6 consisting of Ti/Al and a gate electrode 7 consisting of Ni/Au areprovided on the barrier layer 4.

The off breakdown voltage of the hetero-junction field effect transistordepends on the electric breakdown field of the channel layer 3.Therefore, in order to make the hetero-junction field effect transistorhave high breakdown voltage, it is necessary to use a material with alarge electric breakdown field in the channel layer 3. The off breakdownvoltage of the hetero-junction field effect transistor will be explainedin detail below.

It is assumed that after the channel layer 3 positioned immediatelybelow the gate electrode 7 is firstly depleted, the depleted layerextends only in the lateral direction of the channel layer 3 (the drainelectrode side), the voltage when the generated electric field reachesto the electric breakdown field of the material configuring the channellayer 3 can be calculated as the off breakdown voltage of the fieldeffect transistor. Its calculating method is shown below. When thelength of the depletion layer is made to be x, and the carrierconcentration of the channel layer 3 is made to be Nd, an electric fieldE(x) and a voltage difference V(x) generated in the case that the lengthof the depletion layer is x can be obtained by solving Poisson'sequation shown in the following Formula 1.

$\begin{matrix}{{- \frac{\partial^{2}{V(x)}}{\partial x^{2}}} = {\frac{\partial{E(x)}}{\partial x} = \frac{{qN}_{d}}{ɛ}}} & \left\lbrack {{Formula}\mspace{14mu} 1} \right\rbrack\end{matrix}$

When the depletion layer is not stretched (x=0), both the electric fieldE(0) and the voltage difference V(0) are not generated, so E(0)=0 andV(0)=0, and by using this as a boundary condition, the electric fieldE(x) and voltage difference V(x) are obtained from Formulas 2 and 3 bysolving Formula 1.

$\begin{matrix}{{E(x)} = {\frac{{qN}_{d}}{ɛ}x}} & \left\lbrack {{Formula}\mspace{14mu} 2} \right\rbrack \\{{V(x)} = {{- \; \frac{{qN}_{d}}{2ɛ}}x^{2}}} & \left\lbrack {{Formula}\mspace{14mu} 3} \right\rbrack\end{matrix}$

Because the breakdown of the off state is generated when a generatedelectric field E(x) reaches an electric breakdown field (E a) of thematerial configuring the channel layer 3, a voltage (off breakdownvoltage) V_(BD) at that time is calculated from Formula 4.

$\begin{matrix}{V_{BD} = \frac{ɛ\; E_{a}^{2}}{2q\; N_{d}}} & \left\lbrack {{Formula}\mspace{14mu} 4} \right\rbrack\end{matrix}$

According to Formula 4, the off breakdown voltage is proportional to thesquare of the electric breakdown field of the material configuring thechannel layer 3. The electric breakdown field of a semiconductormaterial depends on the band gap, and the larger the band gap, thehigher the electric breakdown field is. Therefore, the electricbreakdown field of AlN is higher than that of GaN, and the electricbreakdown field of AlN is high as 1.2×10⁷ (V/cm) compared with theelectric breakdown field of GaN being 5.0×10⁶ (V/cm).

The electric breakdown field of AlGaN is generally obtained by linearlyinterpolating the electric breakdown field of GaN and the electricbreakdown field of AlN with the Al composition ratio. Therefore, thehigher the Al composition ratio, the higher the electric breakdown fieldof AlGaN is, and the off breakdown voltage of the hetero-junction fieldeffect transistor in which AlGaN is used in the channel layer 3 becomeshigh. For example, when AlGaN having an Al composition ratio of 0.8 isused in the channel layer 3 shown in FIG. 1, the electric breakdownfield becomes 9.2×10⁶ (V/cm), and it becomes about two times comparedwith the electric breakdown field of GaN. Therefore, the off breakdownvoltage of the hetero-junction field effect transistor is considered tobecome about four times compared with the case of using GaN in thechannel layer 3.

Moreover, the hetero-junction field effect transistor according to thepresent invention is not limited to the hetero-junction field effecttransistor shown in FIG. 1, and the same effect can be obtained evenwith the structure described below. First, Si, sapphire, GaN, AlN, etc.may be used as the substrate instead of the SiC substrate 1 shown inFIG. 1. Further, the channel layer 3 and the barrier layer 4 shown inFIG. 1 are not always limited to the Al composition ratio describedabove. When the Al composition ratio of AlGaN that configures thechannel layer 3 is made to be x and the Al composition ratio of AlGaNthat configures the barrier layer 4 is made to be y, the hetero-junctionfield effect transistor according to the present invention may have anycomposition ratio as long as it is configured so that a relationship ofx<y is held. In this case, the composition ratio x is made to be 0<x<1,and the composition ratio y is made to be 0<y≦1.

Moreover, because the higher the Al composition ratio x of the channellayer 3 is, the higher the electric breakdown field becomes, and the offbreakdown voltage improves accordingly with it as described above, theAl composition ratio x of the channel layer 3 is preferably higher.Further, because the band gap of AlGaN that forms the barrier layer 4also becomes high when the Al composition ratio y is higher, a leakagecurrent from the gate electrode 7 to the drain electrode 6 can besuppressed. Moreover, the band gap becomes the highest in AlN having thelargest Al composition ratio y. Therefore, the Al composition ratio y ofthe barrier layer 4 is preferably higher than the Al composition ratio xof the channel layer 3. These layers are not necessarily configured fromone layer of the same composition, and may be configured withmulti-layered films having different Al composition ratios. Further,n-type or p-type impurities may be contained in these layers.

Furthermore, the thickness of the barrier layer 4 shown in FIG. 1 is notnecessarily made to be 10 nm as long as it is a thickness in whichsecondary electron gas is generated. Moreover, the thickness of thebarrier layer 4 in order to generate the secondary electron gas isdescribed in detail in Embodiment 2. Further, the thickness of thechannel layer 3 shown in FIG. 1 is not necessarily made to be 1 μm, andit may be 0.005 μm to 4 μm.

Further, the source/drain electrode 6 shown in FIG. 1 is not necessarilyformed with Ti/Al, and it may be formed with a metal such as Ti, Al, Ni,Ta, Au, Mo, and W or a multi-layer film constituted with these as longas the ohmic characteristics can be obtained.

Further, the gate electrode 7 shown in FIG. 1 is not necessarily formedwith Ni/Au, and it may be formed with a metal such as Al, Pt, Au, Ni,and Pd, a silicide such as IrSi, PtSi, and NiSi₂, or a nitride metalsuch as TiN and WN.

Next, the hetero-junction field effect transistor of FIG. 2 is shown asa modified example of the hetero-junction field effect transistor shownin FIG. 1. In the hetero-junction field effect transistor shown in FIG.2, a spacer layer 10 consisting of GaN or AlN and having a filmthickness of 0.1 nm to 5 nm is formed between the channel layer 3 andthe barrier layer 4. Electron mobility of a hetero-interface can beimproved and a large drain current can flow by inserting a binarysemiconductor (the spacer layer 10) as shown in FIG. 2.

Next, the hetero-junction field effect transistor of FIG. 3 is shown asa modified example of the hetero-junction field effect transistor shownin FIG. 1. In the hetero-junction field effect transistor shown in FIG.3, a cap layer 11 consisting of GaN and having a film thickness of 0.1nm to 5 nm is formed on the barrier layer 4. The Schottky barrier of thegate electrode 7 becomes high, and the off breakdown voltage can be madehigh by providing the cap layer 11 as shown in FIG. 3.

Next, the hetero-junction field effect transistor of FIG. 4 is shown asa modified example of the hetero-junction field effect transistor shownin FIG. 1. In the hetero-junction field effect transistor shown in FIG.4, a region 12 containing n-type impurities with Si etc. in highconcentration is formed in the barrier layer 4 immediately below thesource/drain electrodes 6 and in a part of the channel layer 3. Contactresistance can be made low by forming the region 12 as shown in FIG. 4.

Next, the hetero-junction field effect transistor of FIG. 5 is shown asa modified example of the hetero-junction field effect transistor shownin FIG. 1. The hetero-junction field effect transistor shown in FIG. 5has a configuration of removing a part or all of the barrier layer 4immediately below the source/drain electrodes 6. Furthermore, it may bea configuration of removing all of the barrier layer 4 immediately belowthe source/drain electrodes 6 and a part of the channel layer 3 in thepresent modified example. Moreover, it is a configuration of removing apart of the barrier layer 4 immediately below the source/drainelectrodes 6 in the example shown in FIG. 5. Contact resistance can bemade low by making the configuration as shown in FIG. 5.

Next, the hetero-junction field effect transistor of FIG. 6 is shown asa modified example of the hetero-junction field effect transistor shownin FIG. 1. In the hetero-junction field effect transistor shown in FIG.6, an insulating film layer 13 such as AlOx, SiNx, SiOx, HfOx, and TiOxis formed on the barrier layer 4 including immediately below the gateelectrode 7. The insulating film layer 13 is formed on a part other thanthe barrier layer 4 in which the source/drain electrodes 6 are formedand on an element separation region 5 in the example shown in FIG. 6.The gate leakage current is decreased and the breakdown voltage betweenthe gate and drain can be improved by providing the insulating filmlayer 13 as shown in FIG. 6.

Next, the hetero-junction field effect transistor of FIG. 7 is shown asa modified example of the hetero-junction field effect transistor shownin FIG. 1. In the hetero-junction field effect transistor shown in FIG.7, the gate electrode structure is not a planar structure, but adapts arecessed gate structure in which the gate electrode 7 is formed inside aregion in which a part of the barrier layer 4 between the source/drainelectrodes 6. Source resistance can be decreased compared to the case ofthe planar structure by making the gate electrode structure being therecessed gate structure as shown in FIG. 7.

Next, the hetero-junction field effect transistor of FIG. 8 is shown asa modified example of the hetero-junction field effect transistor shownin FIG. 1. In the hetero-junction field effect transistor shown in FIG.8, the gate electrode structure is not a planar structure, but adapts anembedded gate structure in which the gate electrode 7 is formed so as tocover a region in which a part of the barrier layer 4 between thesource/drain electrodes 6. Source resistance can be decreased comparedto the case of the planar structure by making the gate electrodestructure being the embedded gate structure as shown in FIG. 8. Further,the electric field concentrated in the edge part of the drain electrodeside of the gate electrode 7 can be relaxed during high voltageoperation, and the breakdown voltage can be made high.

Moreover, the configurations of the above-described modified examplesare not necessarily adapted individually, and the hetero-junction filedeffect transistor may be configured by combining each of them.

Embodiment 2

The calculation result of the energy band structure (energy (eV)) andthe carrier concentration (cm⁻³) in the depth direction of the barrierlayer 4 and the channel layer 3 of the hetero-junction field effecttransistor shown in FIG. 1 is shown in FIG. 9. The calculation result isobtained by solving Poisson's equation and Schrödinger's equationself-consistently. Moreover, values that are generally used are used asphysical property values used in the above-described calculation.

In the graph shown in FIG. 9, the value in which the carrierconcentration is integrated with the depth direction is made to be thesheet carrier density (Ns), and the sheet carrier density of thehetero-junction field effect transistor shown in FIG. 1 is obtained tobe 1.6×10¹³ (cm⁻²).

Similarly, the relationship of the sheet carrier density (cm⁻²) and thethickness (t) (nm) of the barrier layer 4 in the case of combining theAl composition ratio x of the channel layer 3 and the Al compositionratio y of the barrier layer 4 is shown in FIGS. 10 to 14. FIG. 10 is agraph in which the Al composition ratio x of the channel layer 3 isfixed to 0, and the Al composition ratio y of the barrier layer 4 isvaried from 0.2 to 1.0. FIG. 11 is a graph in which the Al compositionratio x of the channel layer 3 is fixed to 0.2, and the Al compositionratio y of the barrier layer 4 is varied from 0.4 to 1.0. FIG. 12 is agraph in which the Al composition ratio x of the channel layer 3 isfixed to 0.4, and the Al composition ratio y of the barrier layer 4 isvaried from 0.6 to 1.0. FIG. 13 is a graph in which the Al compositionratio x of the channel layer 3 is fixed to 0.6, and the Al compositionratio y of the barrier layer 4 is varied from 0.8 to 1.0. FIG. 14 is agraph in which the Al composition ratio x of the channel layer 3 is madeto be 0.8, and the Al composition ratio y of the barrier layer 4 is madeto be 1.0.

It is found from FIGS. 10 to 14 that the sheet carrier density startsincreasing rapidly when the barrier layer 4 becomes a certain thickness.The result of which thickness of the barrier layer 4 at which the sheetcarrier density increases rapidly is shown in every combination of theAl composition ratio x and the Al combination ratio y in Table 1.

TABLE 1 Thickness of Barrier Layer t Al Composition Ratio y of BarrierLayer (nm) 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5 0.55 Al 0 11 64.5 3 2.5 2 1.5 1 1 1 1 Composition 0.05 13 7 5.5 5.25 3 2.25 1.5 1.51.5 1.25 Ratio x of 0.1 15 8 8 4 3 2 2 2 1.5 Channel 0.15 16 8 6.5 5 3.53 2.5 2 Layer 0.2 18 9 7 5 4 3 2.5 0.25 19 10 8 6 4 3.25 0.3 21 11 8 5 40.35 22 11 8.5 6.5 0.4 24 12 9 0.45 25 12 0.5 26 0.55 0.6 0.65 0.7 0.750.8 0.85 0.9 0.95 Thickness of Barrier Layer t Al Composition Ratio y ofBarrier Layer (nm) 0.6 0.65 0.7 0.75 0.8 0.85 0.9 0.95 1 Al 0 1 1 1 1 11 1 1 1 Composition 0.05 1 1 1 1 1 1 1 1 1 Ratio x of 0.1 1 1 1 1 1 1 11 1 Channel 0.15 1.5 1.5 1.5 1.25 1 1 1 1 1 Layer 0.2 2 2 2 1.5 1 1 1 11 0.25 2.5 2.25 2 1.75 1.5 1.25 1 1 1 0.3 3 2.5 2 2 2 1.5 1 1 1 0.35 4.53.75 3 2.75 2.5 2 1.5 1.5 1.5 0.4 6 5 4 3.5 3 2.5 2 2 2 0.45 9.5 7.25 54.25 3.5 3 2.5 2.25 2 0.5 13 9.5 6 5 4 3.5 3 2.5 2 0.55 27 13 10 7.755.5 4.5 3.5 3 2.5 0.6 28 14 10.5 7 5.5 4 3.5 3 0.65 29 14 11 8.25 5.54.75 4 0.7 30 15 11 7 6 5 0.75 31 15 11.5 9 6.5 0.8 32 16 12 8 0.85 3316 12.5 0.9 34 17 0.95 35

In Table 1, for example, it is found that it is good if the thickness ofthe barrier layer 4 is made to be 5 nm or more in the case that the Alcomposition ratio x of the channel layer 3 is made to be 0.2 and the Alcomposition ratio y of the barrier layer 4 is made to be 0.4. By makingthe thickness of the barrier layer 4 to the value or more (5 nm in theabove-described example) shown in Table 1, a sufficiently high sheetcarrier density can be obtained, and a sufficiently high drain currentcan be obtained during producing the field effect transistor.

Moreover, the thickness of the barrier layer 4 is determined from thevalue based on Table 1 in the present embodiment. However, a portionwhere the Al composition ratios x and y are not shown in Table 1 areobtained by dividing internally the value adjacent to the portion. Thatis, in the case that the Al composition ratio x is between x1 and x2 andthe Al composition ratio y is between y1 and y2, first, t(x1, y1) andt(x1, y2) are divided internally, and t(x2, y1) and t(x2, y2) aredivided internally. Then, the barrier layer 4 is formed having thethickness of the value value t(x, y) or more obtained by furtherdividing internally t(x1, y) and t(x2, y) obtained by dividinginternally as described above.

Explaining more specifically, the thickness t (nm) of the barrier layeris made to be thicker than the t(x, y) value in Table 1 in the case thatthe Al composition ratio is x and the Al composition ratio is y. Forexample, it is found from Table 1 that it is good if the thickness t ofthe barrier layer is made to be 8 nm or more in the case that the Alcomposition ratio x is 0.1 and the Al composition ratio y is 0.2.

Further, in the case that the Al composition ratio x and the Alcomposition ratio y are not described in Table 1 and have therelationship of x+0.05≦y<x+0.1, a maximum value described in Table 1 inthe range that is 0.05 step smaller than the Al composition ratio x ismade to be x1, a value in which 0.05 is added to x1 is made to be x2, amaximum value described in Table 1 in the range that is 0.05 stepsmaller than the Al composition ratio y is made to be y1, and a value inwhich 0.05 is added to y1 is made to be y2. Then, a value of [y2×t(x1,y1)−y1×t(x1, y2)+{t(x1, y2)−t(x1, y1)}×y]/0.05=t(x1, y) is obtained fromt(x1, y1) and t(x1, y2) in Table 1. Furthermore, a value of [x2×t(x1,y)−x1×t(x2, y2)+{t(x2, y2)−t(x1, y)}×x]/0.05=t(x, y) is obtained fromthe value of t(x2, y2) in Table 1 and the above-described t(x1, y), andthe thickness t (nm) of the barrier layer is made to be the value oft(x, y) or more.

For example, the above-described relationship is satisfied in the casethat the Al composition ratio x is 0.13 and the Al composition ratio yis 0.19. Therefore, a maximum value described in Table 1 in the rangethat is 0.05 step (0.13 to 0.08) smaller than the Al composition ratio xof 0.13 becomes 0.1, and the value is made to be x1. Then, 0.15 where0.05 is added to 0.1 that is x1 becomes x2. Similarly, a maximum valuedescribed in Table 1 in the range that is 0.05 step (0.19 to 0.14)smaller than the Al composition ratio y of 0.19 becomes 0.15, and thevalue is made to be y1. Then, 0.2 where 0.05 is added to 0.15 that is y1becomes y2.

Then, t(x1, y) is obtained as t(0.1, 0.19)=[0.2×t(0.1, 0.15)−0.15×t(0.1,0.2)++{5(0.1, 0.2)−t(0.1,0.15)}×0.19]/0.05=[0.2×15−0.15×8+{8−15}×0.19]/0.05=9.4. Furthermore,t(x, y) is obtained as t(0.13, 0.19)=[0.15×t(0.1, 0.19)−0.1×t(0.15,0.2)+{t(0.15, 0.2)−t(0.1,0.19)1×0.13]/0.05=[0.15×9.4−0.1×16+{16−9.4}×0.13]/0.05=13.36. As theresult, the thickness t (nm) of the barrier layer is made to be thet(0.13, 0.19)=13.36 nm or more.

Further, in the case that the Al composition ratio x and the Alcomposition ratio y are not described in Table 1 and have a relationshipof y≧x+0.1, a maximum value described in Table 1 in the range that is0.05 step smaller than the Al composition ratio x is made to be x1, avalue in which 0.05 is added to x1 is made to be x2, a maximum valuedescribed in Table 1 in the range that is 0.05 step smaller from the Alcomposition ratio y is made to be y1, and a value in which 0.05 is addedto y1 is made to be y2. Then, a value of [x2×t(x1, y1)−x1×t(x2,y1)+{t(x2, y1)−t(x1, y1)}×x]/0.05=t(x, y1) is obtained from t(x1, y1)and t(x2, y1) in Table 1. A value of [x2×t(x1, y2)−x1×t(x2, y2)+{t(x2,y2)−t(x1, y2)}×x]/0.05 =t(x, y2) is obtained from t(x1, y2) and t(x2,y2) in Table 1. Furthermore, a value of [y2×t(x, y1)−y1×t(x, y2)+{t(x,y2)−t(x, y1)}×y]/0.05=t(x, y) is obtained from the value of t(x, y1) andthe thickness t(x, y2), and the thickness t (nm) of the barrier layer ismade to be the value of t(x, y) or more.

For example, the above-described relationship is satisfied in the casethat the Al composition ratio x is 0.22 and the Al composition ratio yis 0.42. Therefore, a maximum value described in Table 1 in the rangethat is 0.05 step (0.22 to 0.17) smaller than the Al composition ratio xof 0.22 becomes 0.2, and the value is made to be x1. Then, 0.25 where0.05 is added to 0.2 that is x1 becomes x2. Similarly, a maximum valuedescribed in Table 1 in the range that is 0.05 step (0.42 to 0.37)smaller than the Al composition ratio y of 0.42 becomes 0.4, and thevalue is made to be y1. Then, 0.45 where 0.05 is added to 0.4 that is y1becomes y2.

Then, t(x, y1) is obtained as t(0.22, 0.4)=[0.25×t(0.2, 0.4)−0.2×t(0.25,0.4)+{t(0.25, 0.4)−t(0.2,0.4)}×0.22]/0.05=[0.25×5−0.2×8+{8−5}×0.22]/0.05=6.2. t(x, y2) isobtained as t(0.22, 0.45)=0.25×t(0.2, 0.45)−0.2×t(0.25, 0.45)+{t(0.25,0.45)−t(0.2, 0.45)}×0.22]/0.05=0.25×4−0.2×6+{6−4}×0.22]/0.05=4.8.

Furthermore, t(x, y) is obtained as t(0.22, 0.42)=[0.45×t(0.22,0.4)−0.4×t(0.22, 0.45)+{t(0.22, 0.45)−t(0.22,0.4)}×0.42]/0.05=[0.45×6.2−0.4×4.8+{4.8−6.2}×0.42]/0.05=5.64. As theresult, the thickness t (nm) of the barrier layer is made to be thet(0.22, 0.42)=5.64 nm or more.

Moreover, a way of obtaining the portion that is not described in Table1 is not limited to the above-described way, and it may be a mode ofobtaining a function that can apply to the part and supplementing thevalue of the thickness t of the barrier layer by using the function.

Embodiment 3

A manufacturing process of the hetero-junction field effect transistorshown in FIG. 1 is shown in FIGS. 15 to 18. Moreover, the same referencenumbers are appended to the constituting elements in FIGS. 15 to 18 thatare the same constituting elements shown in FIG. 1, and detailedexplanation is omitted. First, with respect to FIG. 15, the buffer layer2, the channel layer 3 consisting of Al_(0.6)Ga_(0.4)N, and the barrierlayer 4 consisting of AlN are epitaxial grown in order by applying anepitaxial growth method such as a MOCVD (Metal Organic Chemical VaporDeposition) method and a MBE (Molecular Beam Epitaxy) method on the SiCsubstrate 1.

Next, with respect to FIG. 16, a metal layer such as Ti, Al, Ni, Ta, Au,Mo, and W is deposited by using a vapor deposition method or a sputtermethod, and the source/drain electrodes 6 are formed with a lift-offmethod, etc.

Next, with respect to FIG. 17, the element separation region 5 is formedin the channel layer 3 and the barrier layer 4 that are outside of theregion where the hetero-junction field effect transistor is produced, byusing an ion implantation method, an etching method, etc. The elementseparation region shown in FIG. 17 is formed by using an ionimplantation method.

Next, with respect to FIG. 18, a layer consisting of a metal such as Al,Pt, Au, Ni, and Pd, a silicide such as IrSi, PtSi, and NiSi₂, or anitride metal such as TiN and WN is deposited by using a vapordeposition method or a sputter method, and the gate electrode 7 isformed with a lift-off method, etc.

The hetero-junction field effect transistor shown in FIG. 1 can beproduced by performing the manufacturing process shown above. Moreover,only a necessary and minimum process for operating as a transistor isdescribed in the above-described manufacturing process. However, it isfinally completed as a device after going through a process of forming aprotective film, wirings, a via-hole, etc.

Moreover, a typical condition is described above. However, ahetero-junction field effect transistor can be produced under thecondition shown below in which the effects of the present invention canbe obtained. First, desired Al composition ratios of the channel layer 3and the barrier layer 4 can be obtained by adjusting flow rate,pressure, and temperature of trimethyl ammonium, trimethyl gallium,ammonia, etc. that become the raw material gas of AlGaN during theepitaxial growth of the channel layer 3 and the barrier layer 4 shown inFIG. 15. Herewith, a hetero-junction field effect transistor thatsatisfies the condition of the Al composition ratio shown in Embodiment1 can be produced.

Further, the channel layer 3 shown in FIG. 15 is epitaxial grown, andthen a thin layer (the spacer layer 10) of 0.1 to 5 nm thickness,consisting of GaN or AlN, is epitaxial grown, and the barrier layer 4may be epitaxial grown on the spacer layer 10. Herewith, thehetero-junction field effect transistor shown in FIG. 2 explained inEmbodiment 1 can be produced, and a hetero-junction field effecttransistor can be obtained that can improve the electron mobility andcan flow a large drain current.

Further, the barrier layer 4 shown in FIG. 15 is epitaxial grown, andthen a thin layer (the cap layer 11) of 0.1 to 5 nm thickness,consisting of GaN, may be epitaxial grown. Herewith, the hetero-junctionfield effect transistor shown in FIG. 3 explained in Embodiment 1 can beproduced, and the off breakdown voltage can be made high.

Further, the formation of the source/drain electrodes 6 shown in FIG.16, the formation of the element separation region 5 shown in FIG. 17,and the formation of the gate electrode 7 shown in FIG. 18 are notnecessarily performed in the above-described order, and the order of thesteps may be exchanged. For example, the manufacturing process offorming the element separation region 5 may be performed before formingthe source/drain electrodes 6.

Further, in the formation of the source/drain electrodes 6 shown in FIG.16, a region 12 doped with ions that is a semiconductor such as Si andthat becomes n-type at high concentration by using an ion implantationmethod, etc. is formed, and the source/drain electrodes 6 may be formedon the region 12. Herewith, the hetero-junction field effect transistorshown in FIG. 4 explained in Embodiment 1 can be produced, and thecontact resistance can be reduced.

Further, in the formation of the source/drain electrodes 6 shown in FIG.16, a part or all of the barrier layer 4 immediately below thesource/drain electrodes 6 is removed by using a dry etching method thatuses Cl₂ etc. for example, and then the source/drain electrodes 6 may beformed. Moreover, in addition to the above-described examples, all ofthe barrier layer 4 immediately below the source/drain electrodes 6 isremoved, a part of the channel layer 3 is removed, and then, thesource/drain electrodes 6 may be formed. Herewith, the hetero-junctionfield effect transistor shown in FIG. 5 explained in Embodiment 1 can beproduced, and the contact resistance can be reduced.

Further, in the formation of the gate electrode 7 shown in FIG. 17, aninsulation film 13 such as AlOx, SiNx, SiOx, HfOx, and TiOx is depositedon the barrier layer 4 by using a vapor deposition method, a plasma CVDmethod, etc., and the gate electrode 7 may be formed on the insulationfilm 13. Herewith, the hetero-junction field effect transistor shown inFIG. 6 explained in Embodiment 1 can be produced, the gate leakagecurrent can be reduced, and the breakdown voltage between the gate andthe source can be improved. Moreover, it is necessary to form wirings onthe corresponding part by removing a part of the source/drain electrodes6 covered with the insulation film 13 by wet-etching with fluoric acid,etc. in order to finally use it as a device.

Further, in the formation of the gate electrode 7 shown in FIG. 17, apart of the barrier layer 4 between the source/drain electrodes 6 isremoved by using a dry-etching method with Cl₂, etc., a recess is formedin advance, and then the gate electrode 7 may be formed. Herewith, thehetero-junction field effect transistor shown in FIGS. 7 and 8 explainedin Embodiment 1 can be produced, and the source resistance can bereduced in comparison with the case of the planar structure.

Embodiment 4

FIG. 19 is a vertical cross-sectional drawing showing one example of astructure of the hetero-junction field effect transistor consisting of anitride semiconductor according to the present embodiment. With respectto FIG. 19, the lowest layer is the semi-insulating SiC substrate 1, anda channel layer 103 consisting of Al_(x)Ga_(1-x)N (0.16≦x≦1)(corresponding to a first nitride semiconductor) is formed on the topsurface of the semi-insulating SiC substrate 101 via a buffer layer 102.Furthermore, a barrier layer 104 consisting of Al_(y)Ga_(1-y)N(0.39≦y≦1, x<y) (corresponding to a second nitride semiconductor) thatforms a hetero-junction with the channel layer 103 is formed on the topsurface of the channel layer 103. A region 105 is the element separationregion. Further, a region 106 piercing the barrier layer 104 and inwhich its bottom surface is in the channel layer 103 is a highconcentration n-type impurity region with an impurity concentration of1×10¹⁸ cm⁻³ or more. Further, the source/drain electrodes 107 formed onthe upper surface of each high concentration n-type impurity region 106consists of Ti/Al for example. Further, a gate electrode 108 formed onthe upper surface of the region of the barrier layer 104 sandwiched witheach high concentration n-type impurity region 106 consists of Ni/Au forexample.

Here, as shown in FIG. 32 of(http://www.optees.saitama-u.ac.jp/˜zyoho/suzuki/ene.html), it isunderstood that the band gap energy of Al_(b)Ga_(1-b)N increases as Alcomposition b becomes larger.

FIG. 20 is a drawing showing the voltage dependency of current flowingbetween source/drain electrodes 107 in the case that the highconcentration n-type impurities region 106 is formed and the case thatit is not formed in a hetero-epitaxial substrate consisting of a nitridesemiconductor having the same structure with that in FIG. 19. Further,FIG. 21 is a drawing showing the voltage dependency of resistanceobtained by differentiating the voltage of FIG. 20 by the current.Moreover, the values in the graphs of FIGS. 20 and 21 are in the casethat the Al composition x of the channel layer 103 is 0.2 and the Alcomposition of the barrier layer 104 is 0.4. In the case that the highconcentration n-type impurities region 106 is not formed, the resistanceis very high, and it is difficult to obtain large output even when it isoperated as a transistor. Contrary to that, in the case that the highconcentration n-type impurities region 106 is formed, a large draincurrent can be obtained, and a large output can be obtained when it isoperated as a transistor because the resistance is largely reduced.

The result is shown in FIG. 41, in which the differential resistancevalue in the case that the high concentration n-type impurities region106 shown in FIG. 21 is not formed is evaluated at the hetero-epitaxialsubstrate consisting of a plurality of nitride semiconductors in whichthe Al composition x of the channel layer 103 is varied. The evaluatedAl compositions x of the channel layer 103 on the substrate are fourvalues of 0, 0.16, 0.2, and 0.38. Moreover, the Al composition y of thebarrier layer 104 is set to a larger value than the Al composition x inthe case of any values of the Al composition x.

Further, FIG. 42 is a drawing showing a result in which the differentialresistance value in the case that the high concentration n-typeimpurities region 106 is not formed is evaluated at a hetero-epitaxialsubstrate consisting of a plurality of the nitride semiconductors inwhich the Al composition y of the barrier layer 104 is varied. Theevaluated Al compositions y of the barrier layer 104 on the substrateare four values of 0.2, 0.39, 0.4, and 0.53. In this time, the Alcomposition x of the channel layer 103 corresponding to each Alcomposition y of the barrier layer 104 is set to a smaller value thanthe Al composition y.

The drain current hardly flows as the differential resistance value islarger, and therefore it can be said that a large output cannot beobtained even if it is operated as a transistor in any of the cases ofFIGS. 41 and 42.

It is found from FIG. 41 that the differential resistance value is about3 digits larger compared with the case that the Al composition x is 0 inthe case that the Al composition x of the channel layer 103 is at least0.16 or more. That is, it is said that the differential resistancebecomes extremely high in the case that the Al composition x of thechannel layer 103 is at least 0.16 or more.

It is found from FIG. 42 that the differential resistance value is about3 digits larger compared with the case that the Al composition y is 0.2also in the case that the Al composition y of the barrier layer 104 isat least 0.39 or more. That is, it is said that the differentialresistance becomes extremely high also in the case that the Alcomposition y of the barrier layer 104 is at least 0.39 or more.

Of course, the differential resistance can become extremely large alsoin the case that the Al composition x of the channel layer 103 is atleast 0.16 or more and that the Al composition y of the barrier layer104 is at least 0.39 or more.

Further, FIGS. 43 and 44 are drawings corresponding to the case that thex-axis of each drawing of FIGS. 41 and 42 is changed to a size of theband gap obtained from the Al compositions.

It is understood from FIG. 43 that the differential resistance increasesremarkably from the case that the band gap of the channel layer 103 is3.8 eV or more.

Further, it is understood from FIG. 44 that the differential resistancevalue increases largely from the case that the band gap of the barrierlayer 104 is 4.5 eV or more.

Furthermore, a result of evaluating the difference in the differentialresistance in the case that the high concentration n-type impuritiesregion 106 is not formed and the case that the high concentration n-typeimpurities region 106 is formed on the hetero-epitaxial substrateconsisting of a plurality of nitride semiconductors in which the Alcomposition x of the channel layer 103 is varied is shown in FIG. 22.The evaluated Al compositions x of the channel layer 103 on thesubstrate are four values of 0, 0.16, 0.2, and 0.38 (moreover, the Alcomposition y of the barrier layer 104 is set to be a larger value thanthe Al composition x in the case of any Al composition x values).

Furthermore, a result of evaluating the difference in the differentialresistance in the case that the high concentration n-type impuritiesregion 106 is not formed and the case that the high concentration n-typeimpurities region 106 is formed on the hetero-epitaxial substrateconsisting of a plurality of nitride semiconductors in which the Alcomposition y of the barrier layer 104 is varied is shown in FIG. 23.The evaluated Al compositions of the barrier layer 104 on the substrateare four values of 0.2, 0.39, 0.4, and 0.53 (the Al composition x of thechannel layer 103 corresponding to each Al composition y of the barrierlayer 104 is set to be a smaller value than the corresponding Alcomposition y).

It is said that the effect of the high concentration impurities region106 (making the resistance of the source/drain electrodes 107 low) is aslarge as the difference in the differential resistance in the case thatthe high concentration n-type impurities region 106 is not formed andthe case that it is formed is larger in any cases of FIGS. 22 and 23.

It is found from FIG. 22 that the differential resistance value is about3 digits larger compared with the case that the Al composition x is 0 inthe case that the Al composition x of the channel layer 103 is at least0.16 or more. That is, it is said that the effect of providing the highconcentration n-type impurities region 106 in which the impurityconcentration is 1×10¹⁸ cm⁻³ or more (making the resistance of thesource/drain electrodes 107 low) becomes extremely large in the casethat the Al composition x of the channel layer 103 is at least 0.16 ormore.

It is found from FIG. 23 that the differential resistance value is about3 digits larger compared with the case that the Al composition y is 0.2also in the case that the Al composition y of the barrier layer 104 isat least 0.39 or more. That is, it is said that the effect of providingthe high concentration n-type impurities region 106 in which theimpurity concentration is 1×10¹⁸ cm⁻³ or more becomes extremely largealso in the case that the Al composition y of the barrier layer 104 isat least 0.39 or more.

Of course, the effect of providing the high concentration n-typeimpurities region 106 in which the impurity concentration is 1×10¹⁸ cm⁻³or more becomes extremely large also in the case that the Al compositionx of the channel layer 103 is at least 0.16 or more and that the Alcomposition y of the barrier layer 104 is at least 0.39 or more.

Further, FIGS. 24 and 25 are drawings of the case that x axes ofdrawings of FIGS. 22 and 23 are made to the size of the band gapobtained from the Al compositions.

It is understood from FIG. 24 that the effect of the high concentrationn-type impurities region 106 in which the impurity concentration is1×10¹⁸ cm⁻³ or more becomes remarkable from the case that the band gapof the channel layer 103 is 3.8 eV or more.

Further, it is understood from FIG. 25 that the effect of the highconcentration n-type impurities region 106 in which the impurityconcentration is 1×10¹⁸ cm⁻³ or more becomes large from the case thatthe band gap of the barrier layer 104 is 4.5 eV or more.

As above, the typical conditions are described in Embodiment 4 (FIG.19). However, the same effect can be obtained under the conditions shownin each Modified Example described below.

MODIFIED EXAMPLE 1

A substrate such as Si, sapphire, GaN, and AlN may be used in place ofthe semi-insulating SiC substrate in FIG. 19.

MODIFIED EXAMPLE 2

The channel layer 103 and the barrier layer 104 shown in FIG. 19 are notnecessarily configured with Al_(x)Ga_(1-x)N (0.16≦x<1) andAl_(y)Ga_(1-y)N (0.39≦y<1, x<y) as shown in FIG. 19 as long as the bandgap of the second nitride semiconductor configuring the barrier layer104 is larger than the band gap of the first nitride semiconductorconfiguring the channel layer 103, the bad gap of the materialconfiguring the channel layer 103 is 3.8 eV or more, and the band gap ofthe material configuring the barrier layer 104 is 4.5 eV or more. Forexample, it may be a layer in which the channel layer 103 is configuredwith In_(a)Al_(b)Ga_(1-a-b)N or in which the barrier layer 104 isconfigured with In_(c)Al_(d)Ga_(1-c-d)N.

MODIFIED EXAMPLE 3

In the case that the channel layer 103 and the barrier layer 104 areconfigured with a compound consisting of at least two elementscontaining N in the three elements of Al, Ga, and N as the structures ofthe channel layer 103 and the barrier layer 104 in the structure ofModified Example 2 (the structure shown in FIG. 19 is one of itsexamples, and for example, when the Al composition y is 1, the barrierlayer 104 becomes AlN, on the other hand, when both the compositions aand b are 0 in the case of Modified Example 2, the channel layer 103becomes GaN.), a large polarization effect is generated in the barrierlayer 104, and therefore a high concentration two-dimensional electrongas can be generated at the hetero-interface. Therefore, it is said thatthe structure has an advantage of making the hetero-junction fieldeffect transistor have high current and high output, and is a preferablestructure.

MODIFIED EXAMPLE 4

The higher the electric breakdown field of the semiconductor materialused in the channel layer 103, the higher its breakdown voltage becomesin the hetero-junction field effect transistor. Because the higher theAl composition, the larger the band gap of Al_(b)Ga_(1-b)N is and thehigher the electric breakdown field is, Al_(x)Ga_(1-x)N used in thechannel layer 103 is preferably one having a higher Al composition x (xis near 1). Further, because it becomes more difficult for the gateleakage current flowing from the gate electrode 108 into thehetero-interface via the barrier layer 104 to flow as the band gap ofthe semiconductor material used in the barrier layer 104 is larger, onehaving a higher Al composition y is preferable as the same forAl_(y)Ga_(1-y)N used as the barrier layer 104. Especially, in the caseof using AlN (the case of that the Al composition y of Al_(y)Ga_(1-y)Nis 1), the gate leakage current can be most reduced.

MODIFIED EXAMPLE 5

The channel layer 103 and the barrier layer 104 shown in ModifiedExamples 2 to 4 do not necessarily have a structure consisting of onelayer of the same composition, and may be a multi-layered filmconsisting of a few layers different of In composition, Al composition,and Ga composition (different a, b, c, and d of In_(a)Al_(b)Ga_(1-a-b)Nand In_(c)Al_(d)Ga_(1-c-d)N). Further, n-type or p-type impurities maybe contained in the above-described nitride semiconductor of theselayers.

MODIFIED EXAMPLE 6

A thin spacer layer 109 of 0.1 nm to 5 nm thickness, consisting of InN,GaN, or AlN, may be inserted between the channel layer 103 and thebarrier layer 104 in FIG. 19 (refers to FIG. 26). By inserting suchtwo-dimensional semiconductor, the electron mobility at the heterointerface is improved, and a large drain current can flow.

MODIFIED EXAMPLE 7

The barrier layer 104 in FIG. 19 may be covered with a thin cap layer110 of 0.1 nm to 50 nm thickness, consisting of GaN (refers to FIG. 27).By making such a structure, the Schottky barrier of the gate electrode108 becomes high, and the breakdown voltage can be made high.

MODIFIED EXAMPLE 8

The source/drain electrodes 107 in FIG. 19 are not necessarily Ti/Al,and may be formed with a metal such as Ti, Al, Nb, Hf, Zr, Sr, Ni, Ta,Au, Mo, and W or a multi-layered film constituted from these metals.

MODIFIED EXAMPLE 9

The concentration of the n-type impurities in the high concentrationn-type impurities region 106 immediately below the source/drainelectrodes 107 described in FIG. 19 is not necessarily constant, and theconcentration of the n-type impurities may be distributed. Especially,in the case of a structure in which the concentration of the n-typeimpurities is increased from the gate electrode 108 side toward thesource/drain electrode 107 side, the electric field concentrated at theend of the drain electrode side of the gate electrode 108 duringapplying a high voltage to the drain electrode can be relaxed, and ahigh breakdown voltage can be realized.

MODIFIED EXAMPLE 10

The high concentration n-type impurities region 106 immediately belowthe source/drain electrodes 107 in FIG. 19 may configure that a part ofit is removed (refer to FIG. 28). By making such a structure, thecontact resistance can be made lower.

MODIFIED EXAMPLE 11

The gate electrode 108 described in FIG. 19 is not necessarilyconfigured with Ni/Au, and may be formed with a metal such as Ti, Al,Pt, Au, Ni, and Pd, a silicide such as IrSi, PtSi, and NiSi₂, or anitride metal such as TiN and WN, or a multi-layered film configuredfrom these.

MODIFIED EXAMPLE 12

There is no necessity that the gate electrode 108 in FIG. 19 is directlycontacting to the barrier layer 104, and may be formed via theinsulating film 111 such as AlGa_(n)O_(o), GaO_(p), AlO_(q), SiN_(r),SiO_(s), HfO_(t), and TiO_(u) (refer to FIG. 29). By making such astructure, the gate leakage current can be reduced.

MODIFIED EXAMPLE 13

The structure of the gate electrode 108 in FIG. 19 may be a recessedgate structure (refer to FIG. 30) that forms the gate electrode 108inside the region in which a part of the barrier layer 104 between thesource/drain electrodes 107 is etched, not the planar structure as shownin FIG. 19. By making such a structure, making a reduced sourceresistance can be achieved in comparison with the case of the planarstructure.

MODIFIED EXAMPLE 14

The structure of the gate electrode 108 in FIG. 19 may be an embeddedgate structure (refer to FIG. 31) that forms the gate electrode 108 soas to cover the region in which a part of the barrier layer 104 betweenthe source/drain electrodes 107 is etched, not the planar structure asshown in FIG. 19. By making such a structure, the source resistance canbe reduced in comparison with the case of the planar structure, and theelectric field concentrated at the edge part of the drain electrode sideof the gate electrode 108 during a high voltage operation can berelaxed, and the breakdown voltage can be made high.

MODIFIED EXAMPLE 15

There is no necessity of adapting the above-described structuresindividually, and it may be a structure in which each is combined.

Embodiment 5

FIG. 45 is a vertical cross-sectional drawing showing one example of thehetero-junction field effect transistor consisting of a nitridesemiconductor according to the present embodiment. The elements in FIG.45 having the same reference numbers as the reference numbers in FIGS.19 to 31 show the same or corresponding elements.

As shown in FIG. 45, both a part immediately below the source/drainelectrodes 107 in the barrier layer 104 and its peripheral part areremoved, and because of that, the thickness is thinner than at least apart of the barrier layer 104 located immediately below the gateelectrode 108. Because the distance between the source/drain electrodes107 and the region where the two-dimensional electron gas that becomes acarrier is formed in the hetero-junction field effect transistor can bemade short also by making such a structure, the resistance can bereduced, and as a result, a large drain current can be obtained, and alarge output can be obtained when operating it as a transistor.

Especially, as shown in FIG. 41 in Embodiment 4, because thedifferential resistance is larger by about 3 digits in the case that theAl composition x of the channel layer 103 is at least 0.16 or morecompared with the case that the Al composition x is 0, it is said thatit is effective to adapt a structure shown in FIG. 45 in the case thatthe Al composition x of the channel layer 103 is at least 0.16 or more.That is, the differential resistance increases to about 3 digits in thestructure excluding the high concentration n-type impurities region 106from the structure in FIG. 19 in the case that the Al composition x ofthe channel layer 103 is at least 0.16 or more. However, such increaseof the differential resistance can be reduced remarkably with thecharacteristic structure in FIG. 45 (in that the distance between thesource/drain electrodes 107 and the region where the two-dimensionalelectron gas is formed becomes shorter than in the case of the structurein FIG. 19 because it has a structure in which a part immediately belowthe source/drain electrodes 107 in the barrier layer 104 is bored in andbecomes thin), and a structure in which a large drain current can beobtained can be realized as in the structure in FIG. 19.

Further, because the differential resistance is larger by about 3 digitsalso in the case that the Al composition y of the barrier layer 104 isat least 0.39 or more compared with the case that the Al composition yis 0.2 as shown in FIG. 42 in Embodiment 4, it is said that it iseffective to similarly adapt a structure shown in FIG. 45 in the casethat the Al composition y of the barrier layer 104 is at least 0.39 ormore.

Of course, it is said that the structure shown in FIG. 45 is effectivealso in the case that the Al composition x of the channel layer 103 isat least 0.16 or more and that the Al composition y of the barrier layer104 is at least 0.39 or more.

Further, it is said that the structure shown in FIG. 45 is effectivealso in the case that the band gap of the channel layer 103 is 3.8 eV ormore or in the case that the band gap of the barrier layer 104 is 4.5 eVor more as shown in FIGS. 43 and 44 in Embodiment 4.

As above, the typical conditions are described in Embodiment 5 (FIG.45). However, the same effect can be obtained under the above-describedconditions shown in each modified example in Embodiment 4 or under theconditions shown in each Modified Example described below.

MODIFIED EXAMPLE 1

The top face of the region where the barrier layer 104 under thesource/drain electrodes has removed is not necessarily a larger regionthan the bottom face of the source/drain electrodes 107, and it is fineas long as at least a part of the region of the barrier layer 104located immediately below the source/drain electrodes 107 is removed.Further, the removed region is not necessarily only the barrier layer104, and a part of the region of the channel layer 103 immediately belowthe barrier layer 104 may be removed in addition to the barrier layer104.

MODIFIED EXAMPLE 2

A contact layer 113 consisting of a material having a smaller band gapthan that of the material forming the barrier layer 104 doped withn-type impurities may be formed between the source/drain electrodes 107and the barrier layer 104 as shown in FIG. 46. Because a parasiticresistance generated between the source/drain electrodes 107 and thesemiconductor can be reduced also by making such a structure, a largedrain current can be obtained, and a large output can be obtained duringoperating it as a transistor.

MODIFIED EXAMPLE 3

There is no necessity of adapting the above-described structures shownin Embodiment 4 or each of its Modified Examples and the above-describedstructures described in the present embodiment or each of its ModifiedExamples 1 and 2 individually, and it may be a structure in which eachis combined. For example, a modified example may be realized in whichthe high concentration n-type impurities region 106 shown in FIG. 19 isapplied to the structure shown in FIG. 45 or FIG. 46.

Embodiment 6

FIG. 33 is a drawing showing the result in which the energy bandstructure and the carrier concentration in the depth direction of thebarrier layer 104 and the channel layer 103 are derived by calculationin the case that the Al composition x of the channel layer 103 is madeto be 0.2, the Al composition y of the barrier layer 104 is made to be0.4, and the thickness of the barrier layer is made to be 20 nm in thestructure shown in FIG. 19. The calculation is carried out by solvingPoisson's equation and Schrödinger's equation self-consistently. Thetwo-dimensional electron gas (2 DEG) at high concentration (2E+20 cm⁻³)is generated at the hetero-interface in the case that the thickness ofthe barrier layer 104 is 20 nm as shown in FIG. 33, and a normally-ontransistor can be obtained in the case of producing a transistor on anepitaxial substrate of such structure.

On the other hand, FIG. 34 is a drawing showing the result in which theenergy band structure and the carrier concentration in the depthdirection of the barrier layer 104 and the channel layer 103 are derivedby the similar calculation in the case that the Al composition x of thechannel layer 103 is made to be 0.2, the Al composition y of the barrierlayer 104 is made to be 0.4, and the thickness of the barrier layer 104is made to be thinner to 6 nm from 20 nm. The two-dimensional electrongas (2 DEG) is not generated at the hetero-interface in this case, and anormally-on transistor can be obtained in the case of producing atransistor on an epitaxial substrate of such structure.

A normally-off transistor in which the threshold becomes positive isdesired to secure safety at an abnormal time in the case of using thetransistor as a power device such as a switching element. In the case ofthe hetero-junction field effect transistor consisting of a nitridesemiconductor, the state as shown in FIG. 34, that is, the state inwhich the two-dimensional electron gas is not generated at thehetero-interface in the state in which a voltage is not applied to thegate electrode 108, can be realized by controlling the thickness of thebarrier layer 104 and a mixed crystal ratio (for example, Al compositionin the case of AlGaN) of atoms constituting the channel layer 103 andthe barrier layer 104, and a normally-off transistor can be produced bymaking such a structure.

Embodiment 7: Manufacturing Method of Embodiment 4

FIGS. 35 to 40 are vertical cross-sectional drawings showing one exampleof a manufacturing process of the hetero-junction field effecttransistor consisting of a nitride semiconductor having a structureshowing FIG. 19. The elements in these drawings having the samereference numbers as the reference numbers in FIGS. 19 to 31 show thesame or corresponding elements.

First, as shown in FIG. 35, each of the buffer layer 102, the channellayer (AlxGa1-xN) 3, and the barrier layer (AlyGa1-yN) 4 is epitaxialgrown in order from the bottom on the substrate 1 by applying anepitaxial growth method such as a MCVD method and an MBE method.Moreover, the substrate having the structure shown in FIG. 35 may bebought from a substrate maker, etc.

Next, as shown in FIG. 36, ions that becomes n-type such as Si areimplanted in a desired region in the nitride semiconductor with thecondition of an implantation dosage 1×10¹³ cm⁻² to 1×10¹⁶ cm⁻² and animplantation energy 10 keV to 1000 keV by using a resist pattern, etc.as a mask 112 by an ion implantation method, etc.

After that, the high concentration n-type impurities region 106 shown inFIG. 37 is formed by a thermal treatment at a temperature of 800° C. to1500° C. by using a RTA (Rapid Thermal Annealing) method, etc. andactivating the doped ions.

Next, as shown in FIG. 38, the source/drain electrodes 107 consisting ofa metal such as Ti, Al, Nb, Hf, Zr, Sr, Ni, Ta, Au, Mo, and W or amulti-layered film constituted from these metals are formed is formed bydepositing these by using a vapor deposition method or a sputteringmethod and then using a lift-off method, etc.

Next, as shown in FIG. 39, the element separation region 105 is formedin the channel layer 103 and the barrier layer 104 other than the regionwhere the transistor is produced by using an ion implantation method, anetching method, etc. An ion implantation method is shown in FIG. 39.

After that, as shown in FIG. 40, the gate electrode 108 consisting of ametal such as Ti, Al, Pt, Au, Ni, and Pd, a silicide such as IrSi, PtSi,and NiSi₂, a nitride metal such as TiN and WN, or a multi-layered filmconstituting from these is formed by depositing these by using a vapordeposition method or a sputtering method and then using a lift-offmethod, etc.

The hetero-junction field effect transistor having the structure shownin FIG. 19 can be produced with the above methods. Only a necessary andminimum process for operating as a transistor is described above.However, the product that is finally completed via a process of forminga protective film, wirings, a via-hole, etc. is used as a semiconductordevice.

Moreover, the typical conditions are described above. However, Thehetero-junction field effect transistor consisting of a nitridesemiconductor having the effect of the present invention can be producedunder the conditions shown in each Modified Example in the presentEmbodiment described below.

MODIFIED EXAMPLE 1

Various nitride semiconductor hetero-junction field effect transistorsshown in Modified Examples 2 to 5 in Embodiment 1 can be produced byadjusting flow rate and pressure of trimethyl ammonium, trimethylgallium, ammonia, etc. which are raw material gas of AlGaN, temperature,and time, and making the channel layer 103 and the barrier layer 104 tohave a desired composition and film thickness at the growth of thechannel layer 103 and the barrier layer 104 shown in FIG. 35.

MODIFIED EXAMPLE 2

The normally-off nitride semiconductor hetero-junction field effecttransistors shown in Embodiment 5 can be produced by adjusting flow rateand pressure of trimethyl ammonium, trimethyl gallium, ammonia, etc.which are raw material gas of AlGaN, temperature and time, and makingthe channel layer 103 and the barrier layer 104 to have a desired Alcomposition and film thickness at the growth of the channel layer 103and the barrier layer 104 shown in FIG. 35.

MODIFIED EXAMPLE 3

After growing the channel layer 103 shown in FIG. 35, growing a thinspacer layer 109 of 0.1 nm to 5 nm thickness comprising InN, GaN, or MN,and then growing the barrier layer 104, the structure shown in ModifiedExample 6 (FIG. 26) in Embodiment 4 can be obtained.

MODIFIED EXAMPLE 4

After growing the barrier layer 104 shown in FIG. 35, and then growing athin cap layer 110 of 0.1 nm to 50 nm thickness comprising GaN, thestructure shown in Modified Example 7 (FIG. 27) in Embodiment 4 can beobtained.

MODIFIED EXAMPLE 5

The high concentration n-type impurities region 106 can be formed inwhich the n-type impurities concentration is distributed as shown inModified Example 9 in Embodiment 4 by repeating the formation of aresist pattern 12 and the ion implantation shown in FIG. 36 severaltimes by changing the resist pattern 12 and the implantation condition(implantation energy and implantation amount).

MODIFIED EXAMPLE 6

In the formation of the source/drain electrodes 107 in FIG. 38, a partor all of the barrier layer 104 immediately below the source/drainelectrodes 107 and a part of the channel layer 103 are removed by usinga dry etching method in which Cl₂ etc. is used, and then thesource/drain electrodes 107 may be formed. The structure as shown inModified Example 10 (FIG. 28) in Embodiment 4 can be obtained by such amethod.

MODIFIED EXAMPLE 7

In the formation of the source/drain electrodes 107 in FIG. 38, a partor all of the barrier layer 104 immediately below the source/drainelectrodes 107 and a part of the channel layer 103 are removed by usinga dry etching method in which Cl₂ etc. is used, and then thesource/drain electrodes 107 may be formed without performing the ionimplantation step and the high-temperature heat treatment step shown inFIGS. 36 and 37 in Modified Example 6. The structure as shown inEmbodiment 5 (FIG. 45) can be obtained by such a method.

MODIFIED EXAMPLE 8

In the formation of the source/drain electrodes 107 in FIG. 38, a partor all of the barrier layer 104 immediately below the source/drainelectrodes 107 and a part of the channel layer 103 are removed by usinga dry etching method in which Cl₂ etc. is used, a contact layer 113consisting of a material having a smaller band gap than the barrierlayer 104 of GaN, etc. doped with the n-type impurities is formed byusing a MOCVD method, etc., and then the source/drain electrodes 107 maybe formed without performing the ion implantation step and thehigh-temperature heat treatment step shown in FIGS. 36 and 37 inModified Example 7 of the present embodiment. The structure as shown inModified Example 2 (FIG. 46) in Embodiment 5 can be obtained by such amethod.

MODIFIED EXAMPLE 9

Each three steps of the formation of the source/drain electrodes 107shown in FIG. 38, the formation of the element separation region 105shown in FIG. 39, and the formation of the gate electrode 108 shown inFIG. 40 are not necessarily performed in this order, and the order ofthe steps may be exchanged. For example, the element separation region105 may be formed before forming the source/drain electrodes 107.

MODIFIED EXAMPLE 10

The field effect transistor having the structure shown in ModifiedExample 12 (FIG. 29) in Embodiment 4 is produced by depositing aninsulation film 111 such as AlGa_(n)O_(o), GaO_(p), AlO_(q), SiN_(r),SiO_(s), HfO_(t), and TiO_(u) by using a vapor deposition method, aplasma CVD method, etc. before forming the gate electrode 108 shown inFIG. 40, and then forming the gate electrode 108, the gate leakagecurrent can be reduced, and the breakdown voltage between the gate andthe source can be improved. Moreover, it is necessary to form wiringsafter removing a part of the source/drain electrodes 107 covered withthe insulation film 111 by wet-etching with fluoric acid, etc. in orderto finally use it as a semiconductor device.

MODIFIED EXAMPLE 11

The hetero-junction field effect transistor having the structure shownin FIGS. 30 and 31 can be produced by removing a part of the barrierlayer 104 between the source/drain electrodes 107 by using a dry-etchingmethod etc. using Cl₂, etc. before forming the gate electrode 108 shownFIG. 40, forming a recess in advance, and then forming the gateelectrode 108.

MODIFIED EXAMPLE 12

There is no necessity of adapting all the above-described manufacturingmethods individually, and a manufacturing method where each is combinedmay be realized.

While the invention has been shown and described in detail, theforegoing description is in all aspects illustrative and notrestrictive. It is therefore understood that numerous modifications andvariations can be devised without departing from the scope of theinvention.

1. A semiconductor device provided with a hetero junction field effecttransistor in which a channel layer comprising a first nitridesemiconductor and a barrier layer comprising a second nitridesemiconductor having a larger band gap than that of said first nitridesemiconductor form a hetero-junction, wherein the band gap of said firstnitride semiconductor in said channel layer is 3.8 eV or more, and atleast a part of a portion located immediately below source/drainelectrodes of said hetero-junction field effect transistor in saidbarrier layer is thinner than at a portion located immediately below agate electrode of said hetero junction field effect transistor in saidbarrier layer.
 2. A semiconductor device provided with a hetero junctionfield effect transistor in which a channel layer comprising a firstnitride semiconductor and a barrier layer comprising a second nitridesemiconductor having a larger band gap than that of said first nitridesemiconductor form a hetero-junction, wherein said band gap of saidbarrier layer is 4.5 eV or more, and at least a part of a portionlocated immediately below source/drain electrodes of saidhetero-junction field effect transistor in said barrier layer is thinnerthan at a portion located immediately below a gate electrode of saidhetero junction field effect transistor in said barrier layer.
 3. Asemiconductor device provided with a hetero junction field effecttransistor in which a channel layer comprising a first nitridesemiconductor and a barrier layer comprising a second nitridesemiconductor having a larger band gap than that of said first nitridesemiconductor form a hetero junction, wherein said first nitridesemiconductor in said channel layer is Al_(x)Ga_(1-x)N (0.16≦x<1), andat least a part of a portion located immediately below source/drainelectrodes of said hetero junction field effect transistor in saidbarrier layer is thinner than at a portion located immediately below agate electrode of said hetero-junction field effect transistor in saidbarrier layer.
 4. A semiconductor device provided with a hetero junctionfield effect transistor in which a channel layer comprising a firstnitride semiconductor and a barrier layer comprising a second nitridesemiconductor having a larger band gap than that of said first nitridesemiconductor form a hetero junction, wherein said second nitridesemiconductor in said barrier layer is Al_(y)Ga_(1-y)N (0.39≦y<1), andat least a part of a portion located immediately below source/drainelectrodes of said hetero junction field effect transistor in saidbarrier layer is thinner than at a portion located immediately below agate electrode of said hetero-junction field effect transistor in saidbarrier layer.